教育背景
2009.9-2013.7，湖南大学，物理与微电子科学学院，获工学学士学位；
2018.7-2021.8，bat365在线中国登录入口所，高频高压中心助理研究员；
高性能数模混合集成电路：高速高精度数据转换器（ADC/DAC）/高速直接数字频率合成器（DDS）。
1、高技术项目“宽带功率放大器芯片性能评价标准研究”，课题负责人；
2、高技术项目“系统级封装设计与实现技术”，课题负责人；
在高速数模混合领域发表SCI/EI文章多篇，代表论著如下：
1. Xuan Guo, Danyu Wu, Lei Zhou, Huasen Liu, Jinwu*, Xinyu Liu, “High speed resolution direct digital frequency synthesizer with non-linear DAC coarse quantization and ROM-based piecewise linear interpolation”, Analog Integrated Circuits and Signal Processing, volume90, Issue:1, pages263–272 (2017);
2. Xuan Guo, Danyu Wu, Lei Zhou, Huasen Liu, Jin Wu, and Xinyu Liu*, “A 2-GHz 32-bit ROM-based direct-digtial frequency sythesizer in 0.13 um CMOS”, Analog Integrated Circuits and Signal Processing , volume 94, Issue:1, pages127–138 (2018) ;
3. Xuan Guo, Wu Danyu, et al, “A 4-GHz 32-bit Direct Digital Frequency Synthesizer in 0.25 um SiGe HBT with SFDR >46 dBc up to Nyquist Bandwidth”; 2016 IEEE Bipolar/BiCMOS Circuits and Technology Meeting (BCTM), 2378-590X;
4. Dong Wang, Xuan Guo, et al, “A 3GS/s 12-bit Current-Steering Digital-to-Analog Converter(DAC) in 55 nm CMOS Technology”; Electronics, 2019,8(4),464 ;
5. Jianwen Li, Xuan Guo*, et al,“A 1GS/s 12-Bit Pipelined/SAR Hybrid ADC in 40 nm CMOS Technology”; Electronics 2020, 9(2), 375;
6. Jianwen Li, Xuan Guo, et al, “A 3GSps 12-bit Four-Channel Time-Interleaved Pipelined ADC in 40 nm CMOS Process”; Electronics 2019, 8(12), 1551;
7. Hanbo Jia, Xuan Guo*, et al, “A 12-Bit 2.4 GS/s Four-Channel Pipelined ADC with a Novel On-Chip Timing Mismatch Calibration”; Electronics 2020, 9(6), 910;
2017年中国科学院我院国家奖学金；
2020年中国科学院我院优秀员工.
人才队伍